בואו לעבוד איתנובואו למצוא את המשרה שתתאים לכישוריכם האישיים ולשאיפות המקצועיות שלכם
Verification Technical leader
•Design Micro-architecture & Documentation
• Verification Micro-architecture & Documentation
• Verification environment, coding, and test writing
• System testing and debug using FPGAs is an advantage
• Debugging (e.g. PCIe, Network Protocol and Logic Analyzers)
• 7 or more years’ experience in verification of networking ASICs
•Strong communication skills, both verbal and written
• Proficiency with Verilog & System Verilog
• Proficiency with UVM strongly desired
• Experience in architecting test bench environments for unit and system level verification
• Strong protocol knowledge in one or more of the following areas: TCP/IP, Ethernet, RDMA, NVMe, NVMf, SATA protocols, and PCIe
• Proven track record with writing detailed test plans
• Problem solving skills and out-of-the-box thinking to test and validate RTL
• Team-Player, can-do attitude and will work well in a group environment while still being able to contribute on an individual basis
Embedded development engineer
The new developer will be part of the MTS (Marvell Total Solution) group.
MTS group work on a full SW solution for L2+ products for our customers.
We are developing all SW layers working on Marvell HW modules.
• Be involved in a key position writing SW for MTS products
• Design and coding, in C.
• Develop & support new Infrastructure & tools for the MTS group developers
• Linux experience – preferred
• SW/HW engineer (in computer science Or electrical engineering)
• Skilled Developer in ANSI-C – Must.
• Networking – Advantage.
• Linux – Advantage
Associate Chip Design Engineer
You will join to the switching chip design team which is responsible for the design in the projects. You will learn chip design tools and use it to execute the design.
Daily tasks include:
• Work with PD and ARC teams get the definition for the device and implement the needed design.
• Gain system understanding and knowledge in the switch architecture
• Ability to work with the different IP teams get there deliveries and integration guide line and implement it-
• Student for Electrical engineering – B.Sc
– Knowledge in System Verilog – advantage
– Knowledge in TCL – advantage
• Work with Product Definition and Architecture teams to get the device definition.
• Own and write the micro-Architecture and implement the needed design.
• End to end responsibility for the chip design.
• Tight work with the different IP teams, receive deliveries & integration guide line and implement it
• Gain system understanding and knowledge in Marvell’s switch architecture
• Learning MISL design and integration tools and use it for chip integration and macro partitioning
• Ability to support the BE team with timing analysis, floorplan guideline adjustments and reviews.
• Experience in IP or Full chip design of at least 5 to 8 years
• Knowledge in Verilog and System Verilog
• Technical knowledge in ASIC design flow and Fullchip micro-architecture aspects
• System view oriented – capable to see the full picture
• Integration experience – advantage
• Good understanding the switching packet walk through – advantage
• I/O and package knowledge – advantage
• Complex situation handling – time management and priority management
• Team work oriented – Communicative, shares his knowledge and willing to learn from others;
• Good inter-personal relation and working relation in a team
• Independent Quality driven – understands the definition, drive high quality and ability for self-check
• Stability – willing to invest for long period.
Associate Verification engineer
We are offering you a great opportunity to Join IP department and be part of the IP development for the next generation Switch.
As a student in the IP department you’ll be responsible for design and verification of ASIC/VLSI of a complex IP.
You will be working with Verilog, System Verilog, UVM, C++, Perl, Python.
You will become a design and verification engineer.
- 2nd / 3rd year student in EE
- Excellent interpersonal and communication skills • Knowledge with logic design and verification (advantage) • Knowledge in programming languages
- Knowledge of logical gates
- Knowledge in programming
- Good learning skills
- Problems solving skill
- Ability to be a part of a team, working in cooperation
Senior Backend Engineer-180130
We are seeking a talented Back-end Team member to join our Embedded CPU division at Marvell Israel
This division develops some of the most advanced, high performance Arm-based Systems on chip in the industry.
In this role you will join a strong and growing Backend team, work with sophisticated tools and flows.
You will be working on industry’s most advanced projects, coping with challenges in timing closure, area reduction & power optimization.
Also, you will be working at advanced technology nodes, 28nm, 16nm, 12nm, deploying Synopsys/Cadence flows, using internally developed flows
Through this role you will have close interaction with Design, DFT and Layout teams.
B.Sc. or MSc in Electrical Engineering
3+ years in Back-end design in advanced technology nodes with either Synopsys or Cadence tools
Deep knowledge in Back-end flows RTL-GDSII, Physical Synthesis, Floorplan, P&R, CTS, STA and Power Analysis
Scripting & Programming skills in Perl and TCL.
RTL/DFT Design background – advantage
Advanced process experience (16nm/12nm) – advantage
Good inter personal relationship and should be able to work in a team and be a good team player.
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