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Jobs for Engineering
Role & responsibilities
• Develop software and firmware for Marvell’s next generation industry leading networking and storage devices.
• Work as part of dynamic, open-minded, innovative software team.
• Design, develop and support a feature-rich software for extremely sophisticated multiprocessor devices, including cutting-edge networking protocols.
• The job requires very strong software engineering skills, broad system understanding, and the ability to come up with creative and original solutions.
The job involves a tight interface with system architecture, OS drivers and hardware teams.
• B.Sc / M.Sc in Computer Science, Electrical Engineering or Computer Engineering (with honors), with 2+ years of related experience.
• At least 2 years of experience in designing, implementing and debugging software for RT embedded systems.
• Experience in C language programing.
• Experience in C++ language programing.
• RDMA and networking protocols knowledge.
• Understanding of computer/server architecture.
• An effective interpersonal, teamwork, and communication skills.
• Excellent communication skills to interface internally and externally with all levels of the organization and to participate in problem solving and quality improvement activities.
• Demonstrates good analysis and problem-solving skills.
• Has an inherent sense of urgency and accountability.
• Grounded, detail-oriented, always backs up ideas with facts.
• Must demonstrate results in a fast-paced, multi-tasking, hands-on work environment along with superb written and verbal communication skills.
VLSI Design Engineer
Member of the design team that is responsible for developing complex, state of the art high-speed Ethernet controller chips.
The candidate will own tasks such as micro-architecture, design, integration and other tasks as part of the chip development and testing processes.Member of the design team that is responsible for developing complex, state of the art high-speed Ethernet controller chips.
The candidate will own tasks such as micro-architecture, design, integration and other tasks as part of the chip development and testing processes.
- BSc. / MSc. university degree in EE/CS, graduation with honors.
- 5+ years of experience in VLSI design.
- Deep knowledge in Verilog.
- Experience in micro-architecture and design of complex blocks.
- Familiar with the verification process of a block (test plan, coverage, etc.).
- Excellent communication skills in English (written and verbal).
Not a must, but an advantage:
- Knowledge in networking and networking chips.
- Experience with multi-clock domain designs.
- Script knowledge (TCL, perl, etc.).
- Understanding the timing closure process (synthesis/STA).
- Understanding DFT.
Understanding the entire chip development flow.
location – Ramat-Gan
Design team manager
A Team manager in the Switch IP department manages 2-6 engineers, including their task allocations, schedule, work effectiveness, acquiring technical skills, career development, and more.
The team manager is responsible for several units or cluster, with good knowledge of the architecture, responsible for choosing correct architecture solutions, planning micro-arch, managing implementation of design and verification environment, managing the full development flow and manage external interfaces.
The team manager is responsible for the team schedule and meeting quality for the different project milestones.
Required skills and experience:
- 8+ years’ experience in VLSI development
- Hands-on experience in design and verification
- Team management experience
- Excellent personal skills
- Visionary and strategic
- High motivation and desire to influence
IP Engineering Program Manager
Marvell Networking is cutting edge silicon technology team, delivering some of the most complex products in the semiconductor industry.
We’re looking for a person that will join our team and be directly responsible for flawless delivery of complex analog IPs and new package technologies into our various Networking products.
You will own the IP program from definition to production, driving and coordinating between IP vendors, technical experts within the team, architecture team, program execution team & operations.
You will manage the communication with the IP vendor – bringing SoWs & special NDAs to completion, overlooking schedule and quality of delivery – making sure vendors meet their commitment on time.
You will make tradeoffs, resolve conflicts, mitigate risks, challenge & push the team to deliver best possible products.
3-5 years of technical project/program management in chip/analog development
Outstanding communication and presentation skills
Strong technical proficiency with lot of chip flow background mainly in physical & post silicon
Technical knowledge in circuit & package
Deep understanding in managing IP vendors delivery
Independent and Self-directed
Education – BSc in Electrical Engineering
Design Engineering Leader
Be part of a Highly skilled, energetic team developing the next generation high – end Embedded SOCs and Communication SOCs for the networking industry.
Lead a team of logic designers through simulation, documentation and SoC integration.
Design/develop custom modules.
Interact with IP teams/vendors to resolve all technical implementation and integration issues.
Work closely with other Design/DV/Validation/SW teams
Work closely with Synthesis, STA and PD teams towards Layout and Timing closure.
B.Sc. in Electrical Engineering
At least 5+ experience years in Design aspects, flows, methodologies and tools.
Good learning and personal skills.
Leading experience – Advantage
We are looking for a customer facing passionate, experienced, hands-on natural leader to give our customers the best customer journey with Marvell
Our Application Manager expected to have knowledge and experience of networking drivers programming and HW fundamentals as well as the curiosity and persistence to take on interesting and challenging issues on a daily basis.
This role requires a natural communication skills with Customers, Field teams as Sales and FAEs
Ability to build a plan with customers and to build supporting plan with the engineering teams and to track it.
The candidate needs the ability to learn technologies and explain technical issues to a variety of audiences, including architects, developers and management. Responsibilities:
Articulate technology and product positioning to both business and technical users
Work with sales & marketing teams through preparation and delivery of technical presentations and application notes by matching specific client business requirements with effective technical solutions
Provide constant customer feedback to executive and development teams
Document technical articles or knowledgebase for use by other technical support personnel and/or customers and partners.
Work cross-functionally within the global organization and with external partners.
Develop with Tools team advanced debug tools to create faster and better customer experience.
Be a CPM or/and Lead CPMs (Customer Program Manager)
- Minimum academic qualification : BSc plus 6 years related experience
- A solid understanding of network communications technology – Internet, Intranet, VPN, Layer2 and layer3 Ethernet layers
- Technical engineering or application engineering experience
- Customers Program management experience
- Experience in leading a team of application engineers or field application engineers.
- Fluent English
- Ability to fly for customer support when needed.
- Experience with Marvell CPSS drivers – Advantage
Senior Design and Verification Engineer
Working in a design and verification small team
Responsible for all design activities including: uArch, coding, debug, timing, power, area, performance and support
Responsible for verification activities including verification strategy and plan, environment, coverage, test plan, debug and reach verification goals
Fully aware of IP factory (parametric design, smooth integration, etc)
Working tightly with architecture team
Experience of at least 5 years
Good system and verification knowledge
Micro arch definition
SV/UVM/Specman – an advantage
Timing, power and area
Synchronization for multiple clocks domains
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