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מהנדסי חומרה

Tools and Automation Developer

Come and join our team that has an existing array of tools, with a mix of homegrown and enterprise components. These need to be maintained, enhanced with new features, and new additional tools need to be developed.
Responsibilities: Development of new tools and infrastructures per team’s requirement definitions, development of new features in existing tools, maintenance of existing tools, adapting existing infrastructures to new driver, managing team’s lab equipment including hardware and software installations
Some of the existing tools: bash/python virtualization based test-automation harness, defect database rest API based data mining, multi Linux distro compilation/toolchain infrastructure, coverity, bullseye

Qualifications:
Experience as a Linux user for 2 years, experience in BASH scripting 1 year
Advantages: background in Python, networking, git, perforce, kernel development, Rest API
Personal traits: Responsibility, Independence, System level thinking, Ability to dive into existing code bases and tools and find your way around.

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מהנדסי חומרה

Junior verification engineer

About to graduate your BSc or MSC degree in Electrical, Electronic or Computer engineering? We invite you to join a Highly skilled, energetic team developing the next generation high – end Embedded SOCs and Communication SOCs for the networking industry.
Be part of Verification Definition and Implementation.
Interact with IP teams/vendors to resolve all technical verification issues.
Work closely with Design/DV/Validation/SW teams.

BSc in Electrical, Electronic, Computer engineering – must
Experience in ASIC Verification using either SV-UVM and/or Specman – an advantage
Good understanding of Verilog – an advantage
Knowledge in Ethernet protocols – an advantage
Experience with Formal Verification – an advantage
Experience with scripting – an advantage

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מהנדסי חומרה

Experienced Back End Engineer

We are looking for an experienced and talented BE engineer to join our SoCs Networking products to be responsible for full flow from RTL to GDS including Synthesis, Place & route, Clock-Tree , Route, STA , LO Verification etc
In this role you will be drive full flow activities independently covering all relevant BE aspects – timing , physical , power etc.
Description
• Handles place & route flow in advanced process nodes (14nm,7nm)
• Drives full backend flow – RTL to GDS including synthesis, P&R, CTS , STA , LO Verif etc
• Explore and define the required backend flow per specific physical block.
• BE Team member – collaborates and be a team player while coping with the overall BE challenges.

Education:
• B.Sc. in Electrical Engineering

Requirements:
• 5+ years in Backend design in advanced technologies. Synopsys/Cadence flows – advantage
• Deep knowledge in Backend flow RTL-GDSII, physical synthesis, Floorplan, place & route, CTS, static timing, power analysis & timing driven.
• Hands On experience in macro level flows including STA capabilities and LO Verification.
• Extensive background in low power design and high frequency design methodologies.
• RTL Design background – advantage.
• Advanced process experience (28nm/16nm) – advantage.

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מהנדסי חומרה

Verification Engineer

Join a Highly skilled, energetic team developing the next generation high – end Embedded SOCs and Communication SOCs for the networking industry.
Be part of Verification Definition and Implementation.
Interact with IP teams/vendors to resolve all technical verification issues.
Work closely with Design/DV/Validation/SW teams.

Requirements:
Must Have experience in ASIC Verification using either SV-UVM and/or Specman
•Must have good understanding of Verilog
•Knowledge in Ethernet protocols – an advantage
•Experience with Formal Verification – an advantage
•Experience with scripting – an advantage

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מהנדסי חומרה

Staff Software Engineer

Be involved in a key position writing SW for MTS products
Design and coding, in C, of a Hardware abstract layer.
Bring-up and support for new PHY and packet processors
Design and implement both low and high level networking applications and protocols.

Requirments:
BA/BSC in Computer Science/SW Engineering /Electrical Engineering
3 or more years of experience in development for embedded systems – Must.
Skilled Developer in ANSI-C – Must.
Networking – Advantage.
Linux – Advantage.
Scrum/Agile – Advantage.

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SW associated engineer

Software driver and applications development for Real-time Embedded systems.
Systems are related to Ethernet bridges and routers.
Design, development and testing of different parts of the driver and other layers.

Requirements:
Student in SW Engineering or Computer Science
At least 1.5 years till graduation
Quick learning ability
C programming language is must.
Linux, Windows environment for development and target platforms.
Position located in Petach Tikva

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Associate VLSI Design engineer

Be part of a Highly skilled, energetic team developing the next generation high – end Embedded SOCs and Communication SOCs for the networking industry.
Be part of Verification Definition and Implementation.
Interact with IP teams/vendors to resolve all technical verification issues.
Work closely with Design/DV/Validation/SW teams.

Requirements:
B.Sc. student in Electrical/SW Engineering in one of Israel’s leading universities
Hunger to learn and be part of a fast moving engineering team.

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Senior Design Engineer

You will join the Full Chip Design Team as a Full Chip Integration Design Engineer.
Your daily tasks will include:
• Work with PD and ARC teams get the definition for the device, write the Arc and implement the needed design.
• Gain system understanding and knowledge in the switch architecture
• Work with the different IP teams, get their deliveries and integration guide line and implement it
• Learning internal integration tools and use it for chip integration and macro partitioning
• Work with FC teams and customers (Verification, emulation, BE) to get their requirements and support their needs.
• Ability to support the BE team with timing analysis and floor plan adjustments

Technical Knowledge:
• Knowledge in Verilog and System Verilog
• System view oriented – manages to see the full picture
• Integration experience – advantage
• Good understanding of Networking and the switching packet walk through – advantage
• I/O and package knowledge – advantage
• Experience in design IP or Full chip of at least 5 to 8 years
• Good debug capabilities
Personal Skills:
• Complex situation handling – time management and priority management
• Team work oriented – Communicative, shares his knowledge and will to learn from others, good personal relation and working relation in a team.
• Independent Quality driven – understands the definition, drive high quality and ability for self-check
• Stability – willing to invest for long period

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Verification leader

Full chip verification staff engineer/leader
Experience with SV/UVM/C++ verification environments
Experienced in unit level verification
Experienced in FC/system level verification
Good architectural understanding
Excellent interpersonal skills

Requirements:
BSC in EE or CS
Knowledge in advanced verification methodologies (UVM/ Specman)
Experienced in unit level verification
Experienced in full chip verification
Deep understanding of modern verification concepts
Good debug capabilities
Knowledge in networking – advantage
Excellent interpersonal skills

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Experienced PCIE Engineer

We are seeking a PCIE expert with proven analytical and technical skills for design and verification of PCIE for next generation switching ASICs.
You will join to the switching chip design team which is responsible for the projects execution and be the PCIE focal point of the group.
Daily tasks include:
Gain system understanding and knowledge in the PCIE standard.
Work with Product Definition and Architecture teams, get the PCIE definition for the device and implement the needed design.
Run Unit Level verification.
Support the BE team with timing analysis, SDC guideline and reviews.
Guide the project with PCIE integration and support Full Chip verification team.
Responsible to perform Post Silicon debug of PCIE.

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